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Compute digests using HASH Processor | STM32L4 | HASH | CMSIS

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HASH Processor The HASH Processor in the STM32L4S5xxx microcontroller supports the Secure Hash Algorithm (SHA-1, SHA-224, SHA-256), the MD5 (Message Digest Algorithm 5), and the HMAC (Keyed-Hash Message Authentication Code) algorithm. For a single block of message, the processor requires 66 clock cycles for SHA-2 and MD5, and 82 clock cycles for SHA-1 mode of operation to compute the digests. Read more about the HASH Processor on the STMicroelectronics STM32L5 . HASH Processor Registers HASH Processor has several registers for Control, Status, Interrupt Configurations and Digest Calculation. The registers that we will be using are: HASH Control Register (HASH_CR) HASH Data Input Register (HASH_DIN) HASH Start Register (HAS_STR) HASH Digest Register x (HASH_HRx) [x = 0 .. 4] HASH Supplementary Digest Register x (HASH_HRx) [x = 5 .. 7] HASH Status Register (HASH_SR) In addition to these, there are HASH Context Swap Registers that contain the complete internal register states of the h...

Encrypting using AES Hardware Accelerator | STM32L4 | AES | CMSIS

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Advanced Encryption Standard AES-128/256 What is the AES Hardware Accelerator?  The AES hardware accelerator (AES) on the STM32L4S5ZI microcontroller encrypts or decrypts data, using an algorithm and implementation fully compliant with the advanced encryption standard (AES). The peripheral supports CTR (Counter Mode), GCM (Galois Counter Mode), GMAC (Galois Message Authentication Code), CCM (Counter with CBC-MAC), ECB (Electronic Codebook), and CBC (Cipher Block Chaining) chaining modes for key sizes of 128 or 256 bits.  The AES Hardware Accelerator contains a  256-bit register for storing the Cryptographic Key (8 * 32-bit registers) and a 128-bit register for storing the Initialization Vector (4 * 32-bit registers). It also has a 32-bit buffer for data input and output. AES Hardware Accelerator Registers The AES Hardware Accelerator uses registers for Controlling and Monitoring the status of the peripheral. In addition to that, it has registers to input Da...

Generating True Random Numbers | STM32L4 | RNG | CMSIS

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True Random Number Generator Randomness is necessary for cryptography operations to be unpredictable and to fend off attacks. We need randomization for everything from key generation to data encryption. We use True Random Number Generators, which create random numbers from an entropy source, to get around this predictability. The STM32L4's RNG peripheral is a true RNG that produces high-quality random numbers. The application is guaranteed to receive all entropy from its 32-bit samples via its built-in conditioning component and analog entropy generator. Read this blog on Random Number generators and their limitations  for more information. The RNG runs on two different clocks: the AHB bus clock and a dedicated RNG clock . The AHB clock is used to clock the AHB banked registers and conditioning components. The RNG clock is used for noise source sampling RNG Registers The RNG peripheral on the STM32L4S5xxx has few registers compared to that of STM32L4P5xxx and STM32L4Q5xxx mic...