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What is CifradoPro? Cifradopro is a baremetal Hardware Security Module based on the STM32L4S5ZI microcontroller. It is capable of generating Random Keys in various sizes, Encrypting plaintext, and Decrypting ciphertext using the Advanced Encryption Standard. Additionally, it can create One-Time Pads of different lengths and generate a Hash of input data using the Secure Hashing Algorithm. The module can store the generated cryptographic keys in an external memory device. As a safeguard against physical tampering, the device is designed to erase the contents of the external memory if the enclosure is breached. The device leverages the Random Number Generator , AES Hardware Accelerator , and HASH Processor of the STM32L4S5ZI for cryptographic operations. It employs the built-in UART peripheral for device control via a serial terminal application such as PuTTY. The external memory, a  256kBit EEPROM from Microchip , is interfaced using the STM32L4's onboard I2C Peripheral. A GPIO pin

HASH Processor The HASH Processor in the STM32L4S5xxx microcontroller supports the Secure Hash Algorithm (SHA-1, SHA-224, SHA-256), the MD5 (Message Digest Algorithm 5), and the HMAC (Keyed-Hash Message Authentication Code) algorithm. For a single block of message, the processor requires 66 clock cycles for SHA-2 and MD5, and 82 clock cycles for SHA-1 mode of operation to compute the digests. Read more about the HASH Processor on the STMicroelectronics STM32L5 . HASH Processor Registers HASH Processor has several registers for Control, Status, Interrupt Configurations and Digest Calculation. The registers that we will be using are: HASH Control Register (HASH_CR) HASH Data Input Register (HASH_DIN) HASH Start Register (HAS_STR) HASH Digest Register x (HASH_HRx) [x = 0 .. 4] HASH Supplementary Digest Register x (HASH_HRx) [x = 5 .. 7] HASH Status Register (HASH_SR) In addition to these, there are HASH Context Swap Registers that contain the complete internal register states of the hash

Advanced Encryption Standard AES-128/256 What is the AES Hardware Accelerator?  The AES hardware accelerator (AES) on the STM32L4S5ZI microcontroller encrypts or decrypts data, using an algorithm and implementation fully compliant with the advanced encryption standard (AES). The peripheral supports CTR (Counter Mode), GCM (Galois Counter Mode), GMAC (Galois Message Authentication Code), CCM (Counter with CBC-MAC), ECB (Electronic Codebook), and CBC (Cipher Block Chaining) chaining modes for key sizes of 128 or 256 bits.  The AES Hardware Accelerator contains a  256-bit register for storing the Cryptographic Key (8 * 32-bit registers) and a 128-bit register for storing the Initialization Vector (4 * 32-bit registers). It also has a 32-bit buffer for data input and output. AES Hardware Accelerator Registers The AES Hardware Accelerator uses registers for Controlling and Monitoring the status of the peripheral. In addition to that, it has registers to input Data, output Data and store Cry

What is the Clock Tree? The clock tree is a hierarchical structure within a microcontroller that distributes clock signals to various parts of the chip. It consists of Clock Sources, Distribution networks, Clock-Gating elements, and Multiplexers to choose specific clock sources. The clock tree ensures that all parts of the chip receive synchronized clock signals and operate in sync with each other, preventing timing issues. Clock gating elements in the clock tree can selectively disable clock signals to unused or idle parts of the chip, reducing power consumption. Read the Wikipedia page on Clock Signal to learn more about the Clock sources and Clock Distribution Network. Clock Sources for the Microcontroller The clock sources available in the STM32L4S5 are  16 MHz High-Speed Internal RC Oscillator clock ( HSI16 ) Multispeed Internal RC Oscillator clock ( MSI ) 4 MHz - 48 MHz High-Speed External Oscillator Clock ( HSE-OSC ) Internal Phase Locked Loop ( PLLCLK ) 32 kHz Low-Speed Intern

True Random Number Generator Randomness is necessary for cryptography operations to be unpredictable and to fend off attacks. We need randomization for everything from key generation to data encryption. We use True Random Number Generators, which create random numbers from an entropy source, to get around this predictability. The STM32L4's RNG peripheral is a true RNG that produces high-quality random numbers. The application is guaranteed to receive all entropy from its 32-bit samples via its built-in conditioning component and analog entropy generator. Read this blog on Random Number generators and their limitations  for more information. The RNG runs on two different clocks: the AHB bus clock and a dedicated RNG clock . The AHB clock is used to clock the AHB banked registers and conditioning components. The RNG clock is used for noise source sampling RNG Registers The RNG peripheral on the STM32L4S5xxx has few registers compared to that of STM32L4P5xxx and STM32L4Q5xxx microcon

What is AESecureIO? AESecureIO is an embedded system application developed on an STM32F401RET6 Nucleo-64 Development Board. It encrypts user-input data using AES-128 in Cipher Block Chain (CBC) Mode and stores it securely on an SD Card using the SDIO Interface. The application also supports the retrieval and decryption of data from the SD Card. This device utilizes the STM32F401 Microcontroller's SDIO (Secure Digital Input/Output) interface and the USART (Universal Synchronous/Asynchronous Receiver/Transmitter) peripheral. The SDIO interface manages data transfer between the microcontroller and the SD Card, while the USART peripheral enables data input and output through a serial monitor, such as PuTTY. The advantage of this device lies in the centralized approach to data encryption and decryption. By using a single point of encryption and decryption with a predefined 128-bit key , the device ensures that data retrieval can only be performed through it. This method grants the use