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Introduction to Buildroot Buildroot is a popular tool for building embedded Linux systems. It simplifies the process of creating custom Linux images for embedded devices by automating the build process and managing dependencies. To learn more about Buildroot and its capabilities, refer to the Buildroot manual and clone the Buildroot source files from the  Buildroot GitHub repository . What we are going to do is, we will first build a default image for the Raspberry Pi 4 using Buildroot along with the OpenSSH package. Then, we will inspect the image after booting it up. Later, we will rebuild the image with additional packages like bash, nginx, and nmap. Generating the .config file for Raspberry Pi 4 The Buildroot tool already has default configurations for widely used platforms. So, we will start off by listing the default configurations available for the Raspberry Pi boards. make list-defconfigs | grep raspberrypi Now, we have to generate the .config file for our Raspberry Pi 4, usin

Digital Camera Interface The DCMI (Digital Camera Interface) is a synchronous parallel interface designed to receive a high-speed data stream from an external CMOS camera module. It offers compatibility with 8-bit, 10-bit, 12-bit, or 14-bit camera modules.  The DCMI peripheral supports Embedded Line and Frame synchronization methods in addition to the Hardware Synchronisation from the CMOS Camera Module. It has two operating mode, namely Continuous or Snapshot mode. Additionally, it offers a crop feature and supports various data formats, including 8/10/12/14-bit progressive video (Monochrome or Raw Bayer), YCbCr 4:2:2 Progressive Video, RGB 565 Progressive Video, and Compressed Data in JPEG format.   For more information on the DCMI peripheral, read the Training material for DCMI on STM32L4 from STMicroelectronics . DCMI Registers The DCMI peripheral has Control and Status registers for the DCMI Core and Interrupts. It also has a few registers for handling Data synchronization, Croppi

What is CifradoPro? Cifradopro is a baremetal Hardware Security Module based on the STM32L4S5ZI microcontroller. It is capable of generating Random Keys in various sizes, Encrypting plaintext, and Decrypting ciphertext using the Advanced Encryption Standard. Additionally, it can create One-Time Pads of different lengths and generate a Hash of input data using the Secure Hashing Algorithm. The module can store the generated cryptographic keys in an external memory device. As a safeguard against physical tampering, the device is designed to erase the contents of the external memory if the enclosure is breached. The device leverages the Random Number Generator , AES Hardware Accelerator , and HASH Processor of the STM32L4S5ZI for cryptographic operations. It employs the built-in UART peripheral for device control via a serial terminal application such as PuTTY. The external memory, a  256kBit EEPROM from Microchip , is interfaced using the STM32L4's onboard I2C Peripheral. A GPIO pin

HASH Processor The HASH Processor in the STM32L4S5xxx microcontroller supports the Secure Hash Algorithm (SHA-1, SHA-224, SHA-256), the MD5 (Message Digest Algorithm 5), and the HMAC (Keyed-Hash Message Authentication Code) algorithm. For a single block of message, the processor requires 66 clock cycles for SHA-2 and MD5, and 82 clock cycles for SHA-1 mode of operation to compute the digests. Read more about the HASH Processor on the STMicroelectronics STM32L5 . HASH Processor Registers HASH Processor has several registers for Control, Status, Interrupt Configurations and Digest Calculation. The registers that we will be using are: HASH Control Register (HASH_CR) HASH Data Input Register (HASH_DIN) HASH Start Register (HAS_STR) HASH Digest Register x (HASH_HRx) [x = 0 .. 4] HASH Supplementary Digest Register x (HASH_HRx) [x = 5 .. 7] HASH Status Register (HASH_SR) In addition to these, there are HASH Context Swap Registers that contain the complete internal register states of the hash